IEEE CS / TCVLSI November Newsletter

We are excited to publish and share with the VLSI global community our TCVLSI Volume 7 Issue 4 newsletter. This is the fourth newsletter in my role as the IEEE-TCVLSI Chair. The Nov 2021 TCVLSI newsletter features an invited article “The future of NAND flash- Compute and non-volatile memory fusion” by Sean Eilert (Micron Technology), Steffen Hellmold (Western Digital), Steve Kramer (Micron Technology), Victor Zhirnov (SRC), where the authors remind folks that in a world where data creation is increasing at an exponential rate, the future NAND will combine logic and memory on single silicon to help balance cost scaling and performance.

The newsletter spotlights one of TCVLSI’s sponsored symposiums in 2021, the IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), where researchers presented their latest findings in the area of asynchronous design. One-page teasers of the best paper awarded at ASYNC 2021 and two best paper nominees are showcased:

• “Towards Explaining the Fault Sensitivity of Different QDI Pipeline Styles”
• “Fluid: An Asynchronous High-level Synthesis Tool for Complex Program Structures”
• “A 28nm Configurable Asynchronous SNN Accelerator with Energy-Efficient Learning”

In a continuation of our Women in VLSI (WiV) series, we share an inspiring interview with Dr. Alice Wang, Edge Platform Architect and VP of Hardware at Everactive, a startup that builds batteryless wireless sensors networks for Industrial IoT applications. Additionally, included is a section on relevant recent announcements collated by our Associate Editor, Ishan Thakkar. I’d love to hear from the readers about what you would like to see in the subsequent newsletters. Feel free to provide any feedback/recommendations via email to me. Happy reading.