Vishwani D. Agrawal

Vishwani D. Agrawal received a B.Sc. degree from the University of Allahabad, India, a BE degree from the University of Roorkee, India, an ME degree from the Indian Institute of Science, and a PhD degree from the University of Illinois at Urbana-Champaign. He has worked in various capacities in both industry and academe. He is a Distinguished Member of Technical Staff at AT&T Bell Labs., Murray Hill, N, and a visiting professor at the Electrical and Computer Engineering Department, Rutgers University. Agrawal was the editor-in-chief of IEEE Design & Test of Computers and is now the editor-in-chief of the Journal of Electronic Testing - Theory and Applications. He has published more than 100 papers and has won several best paper awards. He is the co-author of the books "Test Generation for VLSI Chips," "Unified Methods for VLSI Simulation and Test Generation," and "Neural Models and Algorithms for Digital Testing." Agrawal's research interests are synthesis for testability, neural net methods for test generation, parallel algorithms for fault simulation, and statistical methods for test generation. Agrawal is a Fellow of the IEEE and a member of the ACM.